Job Description / Skills Required
Location – San Francisco Bay Area (Saratoga/San Jose), California
Architecture, implementation and system integration of baseband DSP blocks.
Develop testbeds for validation of digital baseband blocks in simulation and/or emulation platforms.
Bringup and validation of Physical Layer (PHY) designs both in FPGAs and ASICs.
Creative problem solving skills with strong logic design skills.
Strong RTL programming ability using Verilog/SystemVerilog.
Deep knowledge of Digital Signal Processing (DSP) architectures.
Experience in digital baseband/phy design.
Good knowledge of Matlab, C/C++ for DSP blocks, Xilinx/Altera tools.
Excellent communication skills and ability to elaborate on complex concepts.
Enjoys working in a fast paced startup environment.
FPGA platform bringup and debug
Good understanding of wireless communications.
MS in Electrical Engineering with 3+yrs, PhD prefered.