Digital System-on-a-Chip

Job Description / Skills Required

Location – San Francisco Bay Area (Saratoga/San Jose), California


Implement a variety of digital cores

Participate in the design and verification of the SoC architecture and micro-architecture

Develop and implement test plans, close coverage for functional sign-off, work with design verification engineer


Proficient in Verilog and SystemVerilog.

Good understanding of serial protocols such as UART, I2C, and SPI

Familiar with the AMBA protocols and CPU/memory subsystems

Knowledgeable of low power design techniques such as power islands, isolation, and power states

Experience with running and debugging gate level simulations

Skilled in scripting and automation to enable high productivity

Desire to work in a fast paced startup environment

Desired Experience

MS in Electrical Engineering with 4+ years of relevant experience

Experience in constrained random methodologies; CPF and/or UPF-based power intent; wireless protocols; physical design processes